Ferroelectric data processing device

ABSTRACT

In a ferroelectric data processing device for processing and/or storage of data with passive or electrical addressing a data-carrying medium is used in the form of a thin film ( 1 ) of ferroelectric material which by an applied electric field is polarized to determined polarization states or switched between these and is provided as a continuous layer in or adjacent to electrode structures in the form of a matrix. A logic element ( 4 ) is formed at the intersection between an x electrode ( 2 ) and a y electrode ( 3 ) of the electrode matrix. The logic element ( 4 ) is addressed by applying to the electrodes ( 2, 3 ) a voltage greater than the coercivity field of the ferroelectric material. Dependent on the polarization state and the form of the hysteresis loop of the ferroelectric material a distinct detection of the polarization state in the logic element ( 4 ) is obtained and it may also be possible to switch between the polarization states of the logic element, which hence may be used for implementing a bistable switch or a memory cell. The data processing device according to the invention may be stacked layerwise if the separate layers are separated by an electrical isolating layer and hence be used for implementing volumetric data processing devices.

[0001] The present invention concerns a ferroelectric data processingdevice, particularly for processing and/or storage of data with activeor passive electrical addressing, comprising a data-carrying medium inthe form of a thin film of ferroelectric material, wherein theferroelectric material by an applied electric field may attain a firstor a second polarization state by being switched from a disordered stateto one of the polarization states or from the first to the secondpolarization state or vice versa, wherein the ferroelectric materialcomprises logic elements, and wherein a polarization state assigned to alogic element represents a logical value of the logic element.

[0002] The present invention also concerns a method for manufacturing anembodiment of the ferroelectric data processing device, as well as amethod for addressing of logic elements in a ferroelectric dataprocessing device, wherein the logic elements are provided in anelectrical connected passive matrix, particularly for processing and/orstorage of data with active or passive electrical addressing, dependingon whether an addressing operation causes a change in a polarizationstate possibly already present in the logic element, comprising adata-carrying medium in the form of a thin film of a ferroelectricmaterial, wherein the ferroelectric thin film by an applied electricalfield may attain a first or second polarization state and is switchedfrom a disordered state to one of the polarization states or from thefirst to the second polarization state or vice versa, wherein theferroelectric thin film is provided as a continuous layer in or adjacentto respectively a first or second electrode structure and comprises thelogic elements which contact electrodes in this first and secondelectrode structure, wherein a polarization state assigned to a logicelement represents the logical value of the logic element, and whereinthe addressing comprises steps for writing, reading, erasing andswitching of data in the logic element.

[0003] Generally the invention concerns data processing devices withlogic elements implemented in a ferroelectric material. The phenomena offerroelectricity is in this connection supposed known by persons skilledin the art, as the field is comprehensively treated in the literature,for instance in J. M. Herbert Ferroelectric Transducers and Sensors,Gordon and Breach, 1982, wherein in pp. 126-130 there is proposed usinga ferroelectric memory based on single crystals of barium titanateprovided between orthogonal electrodes in an x,y electrode matrix. Theauthor concludes that there are substantial practical difficultiesconnected with the use of ferroelectric single crystals for informationstorage in this simple manner. In regard of recent survey literaturereference may be made to R. G. Kepler and R. A. Anderson, Advances inPhysics, Vol. 41. No. 1, pp. 1-57 (1992).

[0004] As mentioned above, the data-carrying medium is a ferroelectricmaterial in the form of thin film. Such ferroelectric thin films whicheither may be inorganic, ceramic materials, polymers or liquid crystalshave been known for some time and it may in this connection be referredto the above-mentioned article by Kepler and Anderson. There are forinstance from J. F. Scott, Ferroelectric memories. Physics World,February 1995, pp. 46-50, known data storage devices based onferroelectric memory materials. They all have in common that at leastone transistor is necessary in each bit location or memory cell. In themost common embodiments the ferroelectric material is used as adielectric in the associated memory circuit and comprises a bit-storingcapacitor. Due to the high dielectric constant of ferroelectricmaterials, the capacitor may be made much smaller than otherwisepossible and will additionally provide a quite superior charge lifetime.Recently the development has focused on another property offerroelectric materials, namely their ability to be polarizedelectrically when they briefly are subjected to a strong electric field.During the polarization process the dipoles of the ferroelectricmaterial attains a preferred orientation, something which results in amacroscopic dipole moment which is retained after the removal of thepolarizing field. By thus including the ferroelectric material in thegate electrode structure of a field effect transistor in the memory cellcircuit, the transconductance characteristics of the transistors may becontrolled by controlling the polarization state of the ferroelectricmaterial. The latter may be switched, for instance by polarizing fieldswith a direction which either causes a transconductant state “on” or“off” in the transistor.

[0005] EP patent 0 721 189 discloses a ferroelectric memory withdiscrete memory cells provided in an electrode matrix. In addition to adiscrete ferroelectric capacitor each memory cell also comprisesswitching means, preferably in the form of at least one transistor. Thediscrete memory cells hence do not form a passive matrix. With discretememory cells it shall here be understood that the ferroelectriccapacitor is formed by a discrete component, such that the ferroelectricmaterial cannot form a continuous layer in the matrix. There areprovided separate data and selection lines and the read-out of a storeddatum may take place in current or voltage mode on data lines providedfor this purpose, but according to a relatively complicated protocol,such as disclosed by patent claim 6. It must also be remarked that thenumber of memory cells connected in a data signal line must be adjustedin order to adjust parasitic capacitance on each data signal line duringthe readout, such that the voltage variation on one of the data signallines is minimized.

[0006] U.S. Pat. No. 5,592,409 concerns a non-volatile ferroelectricmemory wherein data may be read out without destruction. The memorycells are included in an active matrix and are formed as transistorstructures therein, wherein the gate electrode makes one of theelectrodes in a ferroelectric capacitor. It is evident that theferroelectric capacitors are discrete components. The polarization ofthe capacitor takes place in an as per se well-known manner, but by theread-out which takes place in current mode it is the drain current thatis detected, this in order to prevent the stored data from being erased.

[0007] Even if the use of ferroelectric materials as mentioned aboverepresents substantial improvements relative to alternative technologiesfor storage of data, the basic architecture of ferroelectrically basedmemories is directed to the use of active microcircuits included in eachmemory, cell. This has negative consequences for the achievable datastorage density, i.e. the number of bits which may be stored on a givensurface area, as well as for the cost for each bit stored, somethingwhich partly may be due to complicated manufacturing technology and theuse of active semiconductive components.

[0008] It has also been shown that ferroelectric polymer materials maybe used in erasable optical memories. M. Date & al. has in the paper“Opto-ferroelectric Memories using Vinylidene Fluoride andTrifluoroethylene Copolymers”. IEEE Trans. Electr. Ins.. Vol. 24. No.3.June 1989, pp. 537-540, proposed a data medium comprising a dye-dopedvinylidene fluoride trifluoroethylene copolymer with a thickness of 2μm, spin deposited on a ITO coated glass plate. The information iswritten as sequences of positive and negative polarizations generated byirradiating with a focused laser beam with a diameter of about 5 μm inthe presence of sign controlling electric fields. The data is read outpyroelectrically by scanning with a laser beam. A carrier/noise ratio of48 dB has been obtained by using a regularly repeating data train in theform of 0/1-state with a pitch of 20 μm and with the use of a laserpower of 12 mW and field strength of 25 MV/m. The reading speed was then100 mm/s.

[0009] The object of the present invention is to provide a simple logicarchitecture which may be used for realising either bistable switches ormemory cells in a data processing device or to provide a purelyferroelectric data storage device which offers the possibility ofstoring a very high number of bits in an area unit and which at the sametime may be produced in simple manner in high volume with low cost, suchthat the above-mentioned disadvantages of the prior art are avoided.

[0010] This object is achieved according to the invention with aferroelectric data processing device which is characterized in that theferroelectric thin film is provided as a continuous layer in or adjacentto respectively a first and second electrode structure, that the firstand the second electrode structure each comprises substantially mutuallyparallel strip-like electrodes, such that the electrode structuresmutually form a substantially orthogonal x,y matrix, wherein theelectrodes in the first electrode structure constitute the columns ofthe electrode matrix or the x electrodes and the electrodes in thesecond electrode structure the rows of the electrode matrix or yelectrodes, and that a portion of the ferroelectric thin film at theintersection between an x electrode and a y electrode of the electrodematrix forms a logic element such that the logic elements jointly forman electrically connected passive matrix in the data processing device:a method for manufacturing of a ferroelectric data processing devicebeing characterized by successive steps for depositing a first electrodestructure on a substrate, depositing a layer of electrical isolatingmaterial over the first electrode structure, depositing a secondelectrode structure over the isolating layer, removing the isolatinglayer where it is not covered by the second electrode structure, suchthat the electrodes in the first electrode structure is exposed exceptin the intersection between the electrodes of respectively the first andthe second electrode structure., and depositing a ferroelectric thinfilm in the form of a continuous layer over the electrode structures,and a method for addressing a ferroelectric data processing device,being characterized by the step for writing comprising applying avoltage to the logic element and polarizing the ferroelectric thin filmof the logic element to a positive or a negative polarization statewhich respectively corresponds to a logical 0 or a logical 1 or viceversa, by the step for reading comprising applying a voltage to a logicelement and detecting the charge transfer between the electrodes in thelogic element in the form of a current value, which uniquely indicatesthe logical value, by the step for erasing comprising applying to alllogic elements in the data processing device a voltage which gives alllogic elements one and the same polarization state, and by the step forswitching of a logic element from a polarization state which correspondsto a logical 0 or a logical 1 or vice versa comprising applying avoltage to the logic element which reverses the initial polarizationstate of the logic element.

[0011] According to the invention the ferroelectric thin film isadvantageously formed of a ceramic material or a ferroelectric liquidcrystal material or a polymer or copolymer, the copolymer preferablybeing a vinylidene fluoride/trifluoroethylene copolymer.

[0012] According to the invention in one embodiment the ferroelectricthin film is preferably provided between the first and the secondelectrode structure and the logic element is formed in the intersectionbetween an x electrode and a y electrode.

[0013] According to the invention in another embodiment a layer ofelectrical isolating material is preferably provided between andadjacent to the electrodes of the first and the second electrodestructure, the ferroelectric thin film being provided in the form of acontinuous layer over the electrode structures on one side thereof andthe logic elements are formed respectively in a portion of theferroelectric thin film at the side edges of a y electrode at theintersection between the x electrode and the y electrode.

[0014] In the method for manufacture of the ferroelectric dataprocessing device it is according to the invention advantageous that thesubstrate is formed of a crystalline polycrystalline or amorphoussemiconducting material, for instance silicon.

[0015] In the method for addressing of a data processing deviceaccording to the invention it is particularly preferred applying avoltage which between the electrodes of the logic element generates afield strength which is more than twice the coercivity field of theferroelectric material. According to the invention it is preferred thatthe current detection in the reading step takes place either by samplingin the time domain or in a Time window dependent on the saturation timeconstant of the polarization. Advantageously the current detection,particularly in the latter case, takes place by a level comparison.

[0016] It is according to the invention also preferred that the currentdetection in the reading step is verified in an immediate following stepby applying to the logic element a voltage corresponding to the voltageused in the reading step, but of opposite polarity, and by detecting thecharge transfer between the electrodes in the logic element in the formof a current value.

[0017] If the step for reading and/or verification causes a destructionof a datum stored in the logic element, it is according to the inventionpreferred that the logic element is reset to its initial logic stateafter the current detection in the step for reading or verification byapplying to the logic element a voltage which restores the initialpolarization state of the logic element.

[0018] Further features and advantages will be evident from theadditional appended dependent claims.

[0019] The invention shall now be explained in a more detail inconnection with examples of embodiments of both the data processingdevice and the method and with reference to the accompanying drawing,wherein

[0020]FIG. 1 shows a first embodiment of a ferroelectric data processingdevice according to the invention, seen in plan view.

[0021]FIG. 2 the data processing device in FIG. 1 in a schematic sectiontaken along the line A-A in FIG. 1,

[0022]FIG. 3a a plan view of a logic element in the data processingdevice in FIG. 1.

[0023]FIG. 3b schematically the polarization of the logic element inFIG. 3a.

[0024]FIG. 4 a second embodiment of the data processing device accordingto the invention, seen in plan view,

[0025]FIG. 5 the data processing device in FIG. 4 in a schematic sectiontaken along line A-A in FIG. 4.

[0026]FIG. 6a a plan view of a logic element in the data processingdevice in FIG. 4.

[0027]FIG. 6b schematically the polarization of the logic element in thedata processing device in FIG. 3.

[0028]FIG. 7 a typical hysteresis loop for the polarization of aferroelectric copolymer material.

[0029]FIG. 8 a diagram of the time response of a detected output signal.

[0030]FIG. 9 a diagram of the switching characteristics of aferroelectric copolymer material.

[0031]FIG. 10 schematically and in perspective the embodiment of thedata processing device in FIG. 1 as an x, y electrode matrix with x=y=5,and

[0032]FIG. 11 the data processing device corresponding to that in FIG.10 and arranged in stacked layers in order to implement a volumetricconfiguration.

[0033] In the following examples of embodiments of the ferroelectricdata processing device shall be disclosed in connection with dataprocessing devices with the logic element configured as memory cells,i.e. the device in its entirety implementing a data storing device.Similarly there shall in the following only be referred to the use ofpassive electric addressing of the individual logic element.

[0034]FIG. 1 shows a data storage device with a ferroelectric thin film1 provided between a first and a second electrode structure. The firstand the second electrode structure form as shown in the plan view inFIG. 1 a two-dimensional x, y-matrix with the electrodes 2 of the firstelectrode structure as columns in the matrix or x electrodes and theelectrodes 3 in the second electrode structure as rows in the matrix ory electrodes. Electrodes 2, 3 are connected to respective driver andcontrol circuits 5 for driving the electrodes and detection of outputsignals.

[0035] The electrodes 2, 3 and the ferroelectric thin film are as shownin section in FIG. 2 taken along the line A-A in FIG. 1, provided insandwich configuration between a not shown overlying and underlyingsubstrate which for instance may consist of crystalline silicon. Thesubstrates are for the sake of clarity also left out in FIG. 1. Betweenthe respective substrates and the electrodes 2, 3 and the ferroelectricthin film 1 there may be provided not shown lasters of electricalisolating material. As the substrates themselves have been made insemiconductor material, the driver and control circuits 5 mayadvantageously be made integrated with the substrates in a compatibletechnology, for instance along a side edge of the data processing deviceas suggested.

[0036]FIG. 3a renders enlarged the intersection between an x electrode 2and a y electrode 3 as well as the active area 4 which constitutes alogic element in the ferroelectric thin film 1. This active area 4 will,when applying to the electrodes 2, 3 a drive voltage which generates anelectric field between the x electrode and the y electrode 3, bepolarized electrically in a direction which is determined by the sign ofthe drive voltage or the polarization voltage. The logic element 4 withthe active area in the ferroelectric thin film 1 between the electrodes2, 3, is taken along the line B-B in FIG. 3a, shown schematically inpolarized state in FIG. 3b which implies a polarization in the direction“up” which for instance may correspond to the positive polarization andhence represent a state logic 0 and logic 1 in the logical element 4 orin the memory cell formed in the volume of the ferroelectric thin film 1in the intersection between the x electrode 2 and the y electrode 3. Thedetection of the polarization state, i.e. whether it is positive ornegative, may now quite simply take place by passively addressing thelogic element 4 with a voltage and by detecting the polarization stateas representative for a determined logic state in the logic element 4 bythe charge transfer between the electrodes 2, 3 during the addressing,hence in current mode. The output signal is registered by the controlcircuits and corresponds to the reading of the logical value assigned tothe logic element 4 or memory cell by its present polarization state.This shall, however, be discussed in more detail in connection with thefollowing description of the method for addressing.

[0037] Another embodiment of the data processing device according to theinvention is shown in FIG. 4. Herein the electrode structures arerealized in a bridge configuration which, however, is known from NOpatent application 973390, filed Jun. 17, 1997 and assigned to thepresent applicant. As before, the electrodes 2; 3 in each structure areprovided above each other in a matrix-like configuration and between notshown substrates which once again may be of crystalline silicon, as itis shown by the section in FIG. 5 which is taken along the line A-A inFIG. 4. In contrast with the preceding embodiment the ferroelectric thinfilm 1, however, is provided over the electrode structures. Theelectrodes 2 of the first electrode structure are electrically isolatedfrom the electrodes 3 in the second electrode structure by providing alayer 6 of electrical isolating material in the intersection between theelectrodes 2, 3. The active area in the ferroelectric thin film 1 andwhich comprises the logic element 4 itself will thus appear as shown inplan view in FIG. 6a and in section shown in FIG. 6b taken along theline B-B in FIG. 6a. In FIG. 6b also the polarization of the active areais shown for a corresponding polarization as in FIG. 3b, but with thefield lines curved along the side edges of the isolation layer in theactive area. The drive and control circuits may be realized insemiconductor technology and provided in the not shown semiconductorsubstrate or as separate circuit modules 5 provided along the side edgesof the matrix as disclosed by FIGS. 4 and 5.

[0038] In the manufacturing of the embodiment shown in FIGS. 4 and 5 thefirst electrode structure is deposited on a substrate and then coveredby an isolating layer 6. On the top of the isolating layer 6 the secondelectrode structure is now deposited, such that the first and the secondelectrode structure once again form a two-dimensional matrixconfiguration wherein the x electrodes 2 are the columns and the yelectrode 3 the rows. In the areas where the isolating layer 6 is notcovered by the electrodes 3 in the second electrode structure, theisolating material is now etched away, such that the electrodes 2 in thefirst electrode structure still are completely electrically isolatedfrom the electrodes 3 of the second electrode structure at theintersection of the electrodes, but else exposed. The ferroelectric thinfilm 1 is now provided over the electrode structures before all partspossibly also are covered by an overlying substrate. Otherwise theembodiment is wholly similar to that shown for the data processingdevice in FIGS. 1 and 2. One advantage of the embodiment in FIGS. 4 and5 is that the electrode structures and the accompanying connections anddriver and control circuits are provided on for instance crystallinesilicon substrates before the ferroelectric thin film is applied. Hencethe different process steps which are included in the manufacturing ofthe active circuit elements in semiconductor technology may be performedwithout disturbing the ferroelectric thin film which for instance may bea polymer with a limited temperature tolerance.

[0039] There are a number of ferroelectric materials which may be usedin the ferroelectric thin film. The ferroelectric material may e.g. bean inorganic ceramic material as lead zirconate titanate, aferroelectric liquid crystal material or thin films of polymers. Oneinstance of the latter is a copolymer of vinylidene fluoride (called VF2or VDF) and trifluoroethylene (C₂F₃H, called TFE) where the relativecontent of each component in thin film may be varied in order to obtaindifferent properties. Such copolymers may typically have a lowcoercivity field and show a more square hysteresis loop than which isthe case for pure vinylidene fluoride polymers.

[0040] The switching characteristics of ferroelectric polymers realizedas vinylidene fluoride/trifluoroethylene copolymers are discussed in apaper by Y. Tajitsu & al. with the title “Investigation of SwitchingCharacteristics of Vinylidene Fluoride/Trifluoroethylene Copolymers inRelation to Their Structures”. (Japanese Journal of Applied Physics. 26,pp. 554-560 (1987)) and shall be regarded as a general reference inconnection with the following description of the addressing of a logicelement or a memory cell in the data processing device according to theinvention.

[0041]FIG. 7 shows the hysteresis loop for the polarization of aferroelectric thin film for instance made of vinylidenefluoride/trifluoroethylene copolymer.

[0042] Polarization in C/m² is shown on the y axis and theinterelectrode field strength in V/m on the x-axis. The ferroelectricthin film between the electrodes will initially be in a disordered orunpolarized state and be polarized when applying to the electrodes avoltage which generates a field strength between electrodes greater thanthe coercivity field of the ferroelectric material. The ferroelectricmaterial will dependent on the sign of the polarization voltage attainan electric polarization with preferred orientation “up” represented bythe point I or the hysteresis loop or “down” represented by point II onthe hysteresis loop. The polarization states I and II may also be usedto represent a logic 0 or a logic 1 or vice versa. It shall be remarkedthat the concepts “positive”, “negative”, “up”, “down” of course, mustbe regarded as conventionally normative as they are determined as soonas a determination has been made as to what shall be regarded as thepositive or negative electrode or the polarization “up” or thepolarization “down”. A corresponding convention will be valid for thechoice of which polarization state which shall be regarded as logical 1or logical 0. and this should not lead to problems provided a determinedprotocol is strictly adhered to.

[0043] Consequently a logic element of a ferroelectric material whichare in one of two polarization stages may represent a logic 0 or 1 or abinary 0 or 1 and be implemented as either bistable switches in a dataprocessing device or memory cells in a data storing device. Thepolarization of the logic element to a determined state represent inother words writing of data to this logic element.

[0044] It may be mentioned that the polarization of suitableferroelectric materials used in a logic element may take place at roomtemperature and with high speed by choice of suitable ferroelectricmaterials and the use of a correspondingly high field strength by thepolarization voltage applied to the electrodes of the logic element.When the ferroelectric material is provided as a thin film, thiscomports a number of advantages. As soon as the logic element. i.e. theferroelectric thin film material in the logic element has been given apreferred polarization, this polarization state will last for anindefinite time period at room temperature and in any case for manyyears unless the polarization state is reversed by using a polarizationfield with opposite sign. A cancellation of the polarization state maytake place in analogy with ferromagnetic demagnetization by running thelogic element through a cyclic depolarization field. Strong heating ofthe logic element also may lead to a destruction of the polarizationstate by the electric dipoles loosing their preferred orientation.

[0045] The polarization direction along the hysteresis loop whenapplying a polarization field is indicated with the arrows between thepoints I and IV, and V and VI.

[0046] The readout of data from the logic element shall now be discussedin somewhat greater detail, also in connection with the hysteresis loopshown in FIG. 7. Once more references to expressions such as logical 0and logical 1 or “up” or “down” shall be avoided and there shall only bespoken of positive or negative polarization, represented respectively bythe portion of the hysteresis loop which is located above the x axis andthe portion of the hysteresis loop which is located below the x axis. Ifthe logic element now is in a positive polarization state, representedby the point I on the hysteresis loop, the readout takes place byapplying to the electrodes a voltage which preferably generates a fieldstrength of about two times the coercivity field or more. Thepolarization of the logic element will hence move from the point I toIII, provided that the read voltage has a positive sign. Due to the formof the hysteresis loop which in this case is very close to being square,a change of the polarization state from I to III will lead to a whollyinsignificant charge transfer between the electrodes, and by thedetection of charge transfer between the electrodes in the connectedcontrol circuit a very weak current signal will be obtained. If thelogic element, however, is in a negative polarization state, representedby the point II on the hysteresis loop, the detected output current willby applying to the electrodes a positive voltage for the readout, firstrise insignificantly and thereafter give a very sharply definedtransient current pulse which represents the course between the points Vand VI on the hysteresis loop where the charge transfer is large.Between the points I and II on the hysteresis loop the circumstance of arelatively flat hysteresis loop in other words will imply that thepolarization only changes very little during the application of apositive voltage field, while the change during the application of acorresponding positive voltage when the logic memory element is at pointII on the hysteresis loop will cause a very large change of thepolarization and particularly a substantial part of the change will takeplace between the points V and VI on the steepest portion of thehysteresis loop and also take place in a very short time period,something which results in the above-mentioned current transient as thedetected output signal. This will also make it easy to discern in thereadout between e.g. a logical 0 represented by the polarization statein the point I on the hysteresis loop and a logical 1 correspondinglyrepresented by the point II on the hysteresis loop. The points III andIV on the hysteresis loop represent the saturation state forrespectively the positive and the negative polarization, and when theapplied electrical field is removed, the polarization will drift backrespectively from III to I and from IV to II on the hysteresis loop. Itshall, of course, be understood that in order to drive the polarizationfrom I to III the field must according to the convention followed herebe positive, while it for driving the polarization from state II to IVcorrespondingly, of course, must be negative.

[0047] Now it shall be remarked that the readout or the detection of thepolarization state at II will be destructive, as the logic element afterthe readout arrives in a polarization state represented by the point IIIand thereafter drifts back to the stable state at I. If the readout ofthe polarization state took place when the logic element already was inI, this polarization state will, of course, be retained. After a readoutof the data storage device based on ferroelectric memory cells accordingto the invention, information hence may be retarded as destructed by allmemory cells in the storage device being in the same logical state,either 0 or 1. In practice, this of course, corresponds to an erasing ofinformation and need not have negative consequences if the storedinformation only shall be read once or if readout only is required in aparticular application. If the original information still shall bestored, it will, however, be necessary with a reset or refresh. This maytake place by switching the logic element which originally was in thepolarization state II but which after the readout will be in thepolarization state I, back to the polarization state II by applying anegative voltage for the reset and preferable with the same fieldstrength as in the readout. The polarization will then take place alongthe hysteresis loop from I to IV, where the field is turned off and thelogic elements drift back to the original polarization state at II. Thereset of logic element to the original polarization state after areadout, which destructed this state, can automatically take place bysuitable verification and monitoring procedures implemented over thecontrol circuits of the data processing device and may for instance besoftware controlled according to a readout protocol. For instance therewill in the reset of the polarization state at I to II, in other wordsin the switching of the polarization state I to the polarization stateII, once more be output a current signal with a transient and this maythen constitute the verification signal. Also a correct readout of thepolarization state I may be verified either by applying to the logicelement a voltage with opposite sign and reading a strong currentsignal, but the logic element will then be switched from I to II andmust hence be reset. It will in other words quickly be realized thatdependent on the initial polarization states and a possible destructionduring the readout, the use of verification procedures and resetprocedures will be interchangeable. In order to easier show this it maybe referred to the accompanying table which discloses signs for theapplied voltages during the respectively readout, verification and/orreset as well as resulting currency pulses denoted as low or highaccording to whether the polarization state is changing alone the loopfrom I to III, possibly from IV to II, or from I to IV, possibly from IIto III.

[0048] The procedure for read-out of data as discussed herein isregarded in spite of the destruction as very advantageous when usingferroelectric materials with a nearly square hysteresis loop, as is thecase for VDF-TFE as it gives a reliable detection and verification andthe reset partly takes place spontaneously or in combination withverification. A pure small-signal detection, for instance between II andV, is in this case more problematic with regard to discrimination andrequires an accurate control of the read voltage. If the hysteresis loopon the contrary has a more gentle course between II and V, and between Vand VI, small signal detection may yet be used and reliable detection beobtained without reaching the saturation state III, while the absence ofa sharp voltage threshold at V makes it easy to avoid a destructiveread-out.

[0049] As already stated the form of the hysteresis loop which isdependent on the material, will be of importance for the response whichis detected in a readout. As the hysteresis loop is depicted in FIG. 7,it will be advantageous that the read voltage or the applied electricfield which is used for detecting the polarization state is in the formof a threshold voltage. i.e. attains its maximum value immediately.Dependent of the polarization response and/or the time constant of thepolarization it may be justified using a ramp voltage. i.e. a voltagewhich continuously increases to the desired maximum value whichpreferably will be twice the coercivity field or somewhat more. TABLEPreferred modes for readout, verification and reset, cf. FIG. 7 ResetReadout Verification After readout After verification Voltage CourseCurrent Voltage Course Current Voltage Course Voltage Course Initial +I→III Low − I IV High (none) III→I + IV→I, positive (spontaneous)(IV→II, III→I polarization spontaneous) (I) Initial + II→III High − 1-IVHigh  verification III→II (none) IV→II negative (III→I, IV→II(spontaneous) polarization spontaneous) (II)

[0050] In a passively addressable electrode matrix displacement currentsand resistive current components may be generated. These may mask a weakoutput signal in the current mode, such it will appear on detection ofthe polarization state I, while a transient signal as it is obtained bydetection of the polarization state II, will be clearly discriminatedbecause the displacement currents in common dielectric materials varylinearly with the field strength and appear instantly on application ofthe voltage, which also is the case of the resistive components. Theresistive current components will further be present as long as thefield is applied to the logic element. It will hence in every case bepossible with a distinct discrimination to discern between thepolarization state I or polarization state II. By the detection of thepolarization state II on the hysteresis loop and the use of positiveread voltage the polarization will move from II to III and the outputcurrent, the displacement current and the resistive current componentwill have a response as shown in FIG. 8. The transient in the outputcurrent reaches a peak with a delay Δt after application of the readvoltage and appears in a time window t_(s) which dependent on the signof the field corresponds to one of the two steepest portions of thehysteresis loop of FIG. 7. As will be seen, the current signal isdistinctly discriminated relative to the displacement current and theresistive current component. The detection may take place by sampling oras a level comparison, for instance in the time window t_(s) which herefor instance falls between V or VI on the hysteresis loop. The positionof the time window on a time scale will depend on the polarizationresponse for a given read voltage and the polarization properties of theferroelectric material and the thin-film parameters.

[0051] Another interesting feature when using a ferroelectric materialbased on vinylidene fluoride/trifluoroethylene copolymers VDF-TFE isthat their switching characteristics will depend on the electric fieldstrength. i.e. the electrode voltage. Hence a high polarization voltagewill influence the switching time of a logic element realized in thesaid ferroelectric material in such a manner that the higher theelectric field strength the shorter the switching time. Typicalswitching characteristics for a vinylidene/trifluoroethylene copolymerare shown in FIG. 9 which expresses the relationship between switchingtime and respectively the electrical flux density D and its derivative∂D/∂log t for different field strengths. It will be seen, as thecoercivity field of this copolymer is about 40 MV/m. that a fieldstrength of 100 MV/m. i.e. almost 2.5 times the coercivity fields, willresult in a switching time of 10⁻⁵ s. while the switching time for fieldstrength insignificantly above that of the coercivity field, namely of42 MV/m, gives a switching time of about 5 s. The switching time is inother words reduced with 5 or 6 orders of magnitude with such anincrease of the field strength. On the other hand it is for differentreasons not desirable using a too high field strength, for one thing inorder to avoid undesired stray capacitances or sneak currents in thematrix network and discharges through the thin film.

[0052] If the data processing device according to the invention isencumbered with impedance noise, it will be possible to providecurrent-amplifying line drivers connected to the logical elements inorder to ensure noise immunity when driving for readout or switching.Such line drivers could possible be driven by theread/verification/reset voltage or over a separate supply line.

[0053] An embodiment of the data processing device according to theinvention and corresponding to FIG. 1 is shown in perspective in FIG.10, but with possible substrates and isolating layers removed. Itappears in FIG. 10 as a planar x, y electrode matrix and with the logicelements formed at each intersection between the electrodes 2;3 in thefirst and the second electrode structure. A planar matrix embodiment ofthis kind may be stacked layerwise in order to provide a volumetric dataprocessing device with k stacked planar structures S₁ . . . S_(k), asshown in FIG. 11. It must then be provided layers 7 of electricalisolating material between each planar structure S which in section willappear roughly as shown in FIG. 11. The electrodes 2, 3 may be connectedto not shown addressing and detection lines. i.e. current and voltagebuses, e.g. provided in a semiconductor device made for this purpose,along the side edges of the volumetric device, or if the device isintegrated as a hybrid device on silicon substrates, conveyed directlyto drive voltage and control signal lines connected with driver andcontrol units implemented in the silicon substrate in a compatiblesemiconductor technology. Addressing and detection may for instance takeplace in time multiplex or by using a logic addressing of eachindividual logic element. The number of logic addresses will then be theproduct of the number of stacked matrix structures or layers, the numberof rows and the number of columns in each matrix structure. The numberof separate addresses will be the sum of the number of x and yelectrodes in a layer S and the number of layers S₁ . . . S_(k) in thedevice. The combination of time multiplex-based and logic addressing maybesides be used in order to realize a massive parallel addressing whichcould provide very high write and read speeds. In this regard referencemay also be made to the discussion of volumetrically implemented dataprocessing devices as they for instance are disclosed in Internationalpatent application PCT/NO97/00154 of the present applicant, or thediscussion of the stacked electrode devices as they are disclosed inNorwegian patent application 972803 of the present applicant. It will beobvious to persons skilled in the art that the logic elements realizedeither as bistable switches or memory cells may be used to configurelogic gates or be included as switches in processor networks andarithmetic registers, possibly integrated with the logic elementsrealized as memory modules, or that the logic elements all are realizedas memory cells, such that the device in FIG. 11 will be a volumetricdata device with high storage density. With the use of ferroelectricthin films it will be possible to achieve film thicknesses in the rangeof about 100 nm and corresponding electrode dimensions, something whichimplies that the voltages in order to generate the necessary fieldstrengths will be in the range of about 10 volt. On one μm² it will thenbe possible to realize about 100 logic elements or memory cells,something which will imply a substantial improvement of the data storagedensity when compared to data storage devices of the ROM or RAM typesbased on conventional semiconductor technology.

1. A ferroelectric data processing device, particularly for processingand/or storage of data with active or passive electrical addressing,comprising a data-carrying medium in the form of a thin film (1) offerroelectric material, wherein the ferroelectric material by an appliedelectric field may attain a first or a second polarization state bybeing switched from a disordered state to one of the polarization statesor from the first to the second polarization state or vice versa,wherein the ferroelectric material comprises logic elements (4), andwherein a polarization state assigned to a logic element (4) representsa logical value of the logic element, characterized in that theferroelectric thin film (1) is provided as a continuous layer in oradjacent to respectively a first and second electrode structure, thatthe first and the second electrode structure each comprisessubstantially mutually parallel strip-like electrodes (2;3), such thatthe electrode structures mutually form a substantially orthogonal x, ymatrix, wherein the electrodes (2) in the first electrode structureconstitute the columns of the electrode matrix or the x electrodes andthe electrodes (3) in the second electrode structure the rows of theelectrode matrix or y electrodes, and that a portion of theferroelectric thin film (1) at the intersection between an x electrode(2) and a y electrode (3) of the electrode matrix forms a logic element(4) such that the logic elements (4) jointly form an electricallyconnected passive matrix in the data processing device (2).
 2. Dataprocessing device according to claim 1, characterized in that a logicelement (4) forms a bistabile switch in a data processor means.
 3. Dataprocessing device according to claim 1, characterized in that a logicelement (4) forms a memory cell in a data storage means.
 4. Dataprocessing device according to claim 1, characterized in that theelectrode structures and the ferroelectric thin film (1) are provided ona substrate.
 5. Data processing device according to claim 1,characterized in that the ferroelectric thin film (1) is formed of aceramic material.
 6. Data processing device according to claim 1,characterized in that the ferroelectric thin film is formed of aferroelectric liquid crystal material.
 7. Data processing deviceaccording to claim 1, characterized in that the ferroelectric thin film(1) is formed of a polymer or copolymer.
 8. Data processing deviceaccording to claim 1, characterized in that the copolymer is avinylidene trifluoride/trifluoroethylene copolymer.
 9. Data processingdevice according to claim 1, characterized in that the ferroelectricthin film (1) is provided between the first and the second electrodestructure, and that the logic element (4) is formed in the intersectionbetween an x electrode (2) and a y electrode (3).
 10. Data processingdevice according to claim 1, characterized in that a layer (6) of anelectrical isolating material is provided between and adjacent to theelectrodes (2;3) of the first and the second electrode structure, thatthe ferroelectric thin film (1) is provided in the form of a continuouslayer over the electrode structures on one side thereof, and that thelogic elements (4) are formed respectively in a portion of theferroelectric thin film (1) at the side edges of an y electrode (3) atthe intersection between the x electrode (2) and the y electrode (3) 11.A method for manufacturing of a ferroelectric data processing deviceaccording to claim 10 characterized by successive steps for depositing afirst electrode structure on a substrate, depositing a layer (6) ofelectrical isolating material over the first electrode structure,depositing a second electrode structure over the isolating layer (6),removing the isolating layer (6) where it is not covered by the secondelectrode structure, such that the electrodes (2) in the first electrodestructure is exposed except in the intersection between the electrodes(2;3) of respectively the first and the second electrode structure, anddepositing a ferroelectric thin film (1) in the form of a continuouslayer over the electrode structures.
 12. A method according to claim 11,characterized by the substrate being formed of a crystalline,polycrystalline or amorphous semiconductor material, for instancesilicon.
 13. A method according to claim 11, characterized by depositinga continuous layer of an electrical isolating material between thesubstrate and the first electrode structure before depositing the firstelectrode structure on the substrate.
 14. A method for addressing oflogic elements (4) in a ferroelectric data processing device, whereinthe logic elements are provided in an electrically connected passivematrix, particularly for processing and/or storage of data with activeor passive electrical addressing, depending on whether an addressingoperation causes a change in a polarization state possibly alreadypresent in the logic element, comprising a data-carrying medium in theform of a thin film (1) of a ferroelectric material, wherein theferroelectric thin film (1) by an applied electrical field may attain afirst or second polarization state and is switched from a disorderedstate to one of the polarization states or from the first to the secondpolarization state or vice versa, wherein the ferroelectric thin film(1) is provided as a continuous layer in or adjacent to respectively afirst or second electrode structure and comprises the logic elements (4)which contact electrodes (2;3) in this first and second electrodestructure, wherein a polarization state assigned to a logic element (4)represents the logical value of the logic element, and wherein theaddressing comprises steps for writing, reading, erasing and switchingof data in the logic element, characterized by the step for writingcomprising applying a voltage to the logic element and polarizing theferroelectric thin film of the logic element (4) to a positive or anegative polarization state which respectively corresponds to a logical0 or a logical 1 or vice versa, by the step for reading comprisingapplying a voltage to a logic element (4) and detecting the chargetransfer between the electrodes (2;3) in the logic element in the formof a current value, which uniquely indicates the logical value, by thestep for erasing comprising applying to all logic elements (4) in thedata processing device a voltage which gives all logic elements one andthe same polarization state, and by the step for switching of a logicelement (4) from a polarization state which corresponds to a logical 0or a logical 1 or vice versa, comprising applying a voltage to the logicelement (4) which reverses the initial polarization state of the logicelement.
 15. A method according to claim 14, characterized by applying avoltage which between the electrodes (2, 3) of the logic element (4)generates a field strength which is more than twice the coercivity fieldof the ferroelectric material.
 16. A method according to claim 14,characterized by generating the applied voltage as a ramp voltage.
 17. Amethod according to claim 14, characterized by generating the appliedvoltage as a threshold voltage.
 18. A method according to claim 14,characterized by the current detection in the reading step taking placeby sampling in the time domain.
 19. A method according to claim 14,characterized by the current detection in the reading step taking placein a time window dependent on the saturation time constant of thepolarization.
 20. A method according to claim 18 or 19, characterized bythe current detection taking place by a level comparison.
 21. A methodaccording to claim 14, characterized by verifying the current detectionin the step for reading in an immediate following step by applying tothe logic element (4) a voltage corresponding to the voltage used in thereading step, but of opposite polarity, and detecting the chargetransfer between the electrodes (2;3) in the logic element (4) in theform of a current value.
 22. A method according to claim 14 or claim 21,wherein the step for reading and/or verification causes a destruction ofa datum stored in the logic element (4), characterized by the logicelement (4) being reset to its initial logic state after the currentdetection in the step for reading or verification by applying to thelogic element a voltage which restores the initial polarization state ofthe logic element.
 23. A method according to claim 22, characterized bythe reset of the logic element (4) taking place in combination with thestep for verification and itself being verified in a further currentdetection.